Need of compression logic for scan. EDT compactor.
Collectively feeding multiple scan chains in the design.
For basics:
www.mentor.com/products/dft/news/articles/upload/06_TM_test_compression.pdf
Advanced stuff:
www.mentor.com/products/dft/upload/ITC2005_Compressed_Pattern_Diagnosis_30_3.pdf
More test strategies for testing memories:
http://www.elecdesign.com/Articles/Print.cfm?ArticleID=9527
Multiple short scan chains could be connected to single
big scan chain. Only care is required to see if the connection
is done to correct edge triggered scans. Output of one scan chains
becomes input of another scan chain.
Multiple clock domains might require lockup latches for connecting
mutiple smaller scan chains to one scan chain
- Bharat Singh | rathorebharat
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